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Synthesis Technology

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Cat: 660460 Rel: 15 Mar 18
 
4-stage Analog Shift Register (ASR) module with built-in quantizer & digital noise generator - 14HP
Notes: The E102 is a 4-tap delay for control voltages (a digital implementation of the Serge ASR - Analog Shift Register). There is also a digital noise generator with 8 different types of noise spectra. With no CV patched into the INPUT jack, the digital noise is sampled. Each clock pulse (internally set by RATE or patched into CLOCK IN) samples the INPUT and stores it as a 14-bit value. Successive clocks then shift the sampled voltage to the next output. The sampled voltage is shifted in the delay line as OUT1 > OUT2 > OUT3 > OUT4. A quad 14-bit DAC drives the outputs with an accuracy of <1mv.

A unique addition to the traditional ASR is the voltage-controlled DELAY. Selectable in 3 ranges, this adds delay stages in-between each output. For example, if DELAY was 2, then it would take 6 additional clocks for the OUT1 to "travel" down the delay line to appear at OUT4. The INPUT is sampled once for each clock, no matter what the DELAY is. The outputs can be quantized to whole-note steps.

The most common use of the E102 is having each OUT drive a VCO. If you have a step sequencer, then use the sequencer's clock into CLOCK IN and the sequencer's CV out to INPUT. The 4 OUTs will then generate a musical canon (like "Row Row Row Your Boat") when driving 4 VCOs. Each VCO will play the same note as the prior clocked output. This is of course assuming DELAY = 1. DELAY is not the same as a 'clock divider': when DELAY is not 1 (say it is 12), then every sample clock, the INPUT is fed into the delay. In this case there are 12 clock-delay stages between each out. If 0.25V was sampled and appears at OUT1, then 12 clocks later that same 0.25V appears at OUT2. There is no delay from INPUT to OUT1. The delays are OUT1 to OUT2, OUT2 to OUT3, and OUT3 to OUT4. OUT1 is a 'traditional' sample/hold.
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 1 in stock $240.68
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